{"id":2713,"date":"2022-04-14T15:34:33","date_gmt":"2022-04-14T12:34:33","guid":{"rendered":"https:\/\/site.dcae.pub.ro\/?p=2713"},"modified":"2022-04-14T15:34:34","modified_gmt":"2022-04-14T12:34:34","slug":"digital-system-design-project-i-2","status":"publish","type":"post","link":"https:\/\/etti.upb.ro\/en\/2022\/04\/14\/digital-system-design-project-i-2\/","title":{"rendered":"Digital System Design Project I"},"content":{"rendered":"<p><strong>Course Holder<\/strong>: Conf. dr. eng. Zoltan HASCSI<br><strong>Laboratory holder<\/strong>: Conf. dr. eng. Zoltan HASCSI<\/p>\n\n\n\n<p>Design, verification, implementation, and test of a complex digital system, with a parallel processor, memory system and access interface. Part I concerns the design and verification of a pipeline RISC processor, with parallel execution units and advanced management of data and control dependencies. The project also aims to introduce students to state-of-the-art design flow, hardware-software co-design, golden model verification, using one of the industry standard EDA tool and employing the Verilog HDL language.<\/p>","protected":false},"excerpt":{"rendered":"<p>Titular Curs: Conf. dr. ing. Zoltan HASCSITitular laborator: Conf. dr. ing. Zoltan HASCSI Design, verification, implementation, and test of a complex digital system, with a parallel processor, memory system and access interface. Part I concerns the design and verification of a pipeline RISC processor, with parallel execution units and advanced management of data and control dependencies. The project also aims [&hellip;]<\/p>\n","protected":false},"author":8,"featured_media":1512,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_coblocks_attr":"","_coblocks_dimensions":"","_coblocks_responsive_height":"","_coblocks_accordion_ie_support":"","_eb_attr":"","_uag_custom_page_level_css":"","footnotes":""},"categories":[41,169,38],"tags":[],"class_list":["post-2713","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-am","category-am-semestrul-1","category-master-cursuri"],"acf":[],"featured_image_src":"https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp","author_info":{"display_name":"\u021aar\u0103lung\u0103 Drago\u0219 Daniel","author_link":"https:\/\/etti.upb.ro\/en\/author\/dragos-taralunga\/"},"uagb_featured_image_src":{"full":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"thumbnail":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-150x150.webp",150,150,true],"medium":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-300x223.webp",300,223,true],"medium_large":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"large":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"elegant_blocks_team_1":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"elegant_blocks_blog_1":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"elegant_blocks_slider_1":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"1536x1536":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"2048x2048":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"trp-custom-language-flag":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-16x12.webp",16,12,true],"bizberg_medium":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-300x289.webp",300,289,true],"bizberg_gallery":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"bizberg_blog_list":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-368x240.webp",368,240,true],"bizberg_detail_image":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"bizberg_portfolio_homepage":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false],"bizberg_blog_list_no_sidebar_1":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq-220x190.webp",220,190,true],"bizberg_detail_image_no_sidebar":["https:\/\/etti.upb.ro\/wp-content\/uploads\/2021\/04\/pynq.webp",388,289,false]},"uagb_author_info":{"display_name":"\u021aar\u0103lung\u0103 Drago\u0219 Daniel","author_link":"https:\/\/etti.upb.ro\/en\/author\/dragos-taralunga\/"},"uagb_comment_info":0,"uagb_excerpt":"Titular Curs: Conf. dr. ing. Zoltan HASCSITitular laborator: Conf. dr. ing. Zoltan HASCSI Design, verification, implementation, and test of a complex digital system, with a parallel processor, memory system and access interface. Part I concerns the design and verification of a pipeline RISC processor, with parallel execution units and advanced management of data and control&hellip;","_links":{"self":[{"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/posts\/2713","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/users\/8"}],"replies":[{"embeddable":true,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/comments?post=2713"}],"version-history":[{"count":1,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/posts\/2713\/revisions"}],"predecessor-version":[{"id":2714,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/posts\/2713\/revisions\/2714"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/media\/1512"}],"wp:attachment":[{"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/media?parent=2713"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/categories?post=2713"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/etti.upb.ro\/en\/wp-json\/wp\/v2\/tags?post=2713"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}