Digital System Design Project II

Lecturer: drd. eng. Mihaela DAMIAN

Design, verification, implementation and test of a complex digital system with a parallel processor, memory system and access interface. Part II concerns the integration of the processor, its memories and I/O interfaces into a complete system, using various protocols. The project also focuses on comparing different design approaches like HLS or RTL design. Additionally, it evaluates the impact of RTL code, timing and placement constraints on the implementation results. In the end, the system is tested on a development board.